1. Field of the Invention
The present invention relates to a semiconductor device, in particular, to a semiconductor device using an N-type MOS transistor as an ESD protection element.
2. Description of the Related Art
In a semiconductor device including a MOS transistor, in order to prevent electrostatic breakdown of an internal circuit by static electricity from a pad for external connection (VDD), an off transistor provided under a state in which a gate potential of an N-type MOS transistor is fixed to a ground potential (Vss) so as to be in an off state is often used as an ESD protection element.
The off transistor should have a channel width (W) which is larger than that of an ordinary internal MOS transistor structure since an off transistor must flow the entire current caused by the static electricity in a short time and in a large amount. As a result, it is often the case that the entire channel width of an off transistor is increased by adopting a structure of a multi-finger type in which a plurality of drain regions, source regions, and gate regions are combined in the shape of a comb.
However, due to the structure in which a plurality of transistors are combined, it is difficult for the entire MOS transistor for ESD protection to operate uniformly, and there is a problem in that only a comb tooth which first enters parasitic bipolar operation cannot receive the entire ESD surge, resulting in local breakdown. A substrate contact for fixing the gate potential of the off transistor to a ground potential is provided for a guard ring which is provided around the off transistor. Since a guard ring is generally provided to surround an ESD protection element, the distance from the substrate contact provided around the comb-like ESD protection element to the respective unit tooth ESD protection elements, that is, to the respective bases of the parasitic bipolar transistors varies. Specifically local voltage difference as a trigger at which the parasitic bipolar transistor formed between a source region and a channel region after avalanche breakdown is turned on varies because the base resistance varies among the comb teeth. The timing of operation of the parasitic bipolar transistor varies among the respective unit ESD protection elements. Accordingly current concentrates on the unit ESD protection element having the parasitic bipolar transistor which has been turned on the earliest, resulting in local breakdown.
As a measure for preventing this phenomenon, a layout method has been proposed in which, by decreasing the distance between a contact in a drain region and a gate electrode as an external connection element becomes farther so as to increase the speed of operation of the transistor, the entire comb teeth uniformly enter a snap-back state that is the beginning of bipolar operation (see, for example, Japanese Published Patent Application No. H07-45829).
However, the above-mentioned method has problems in that, as the width of the drain region is reduced, it becomes more difficult to secure a desired position of the contact, and, as the resistance of the interconnecting line becomes lower due to the interconnecting line containing a high-melting point metal in recent years, the propagation speed of the surge becomes further faster, and there are cases in which only the distance between the contact and the gate electrode cannot make a complete adjustment.